This invention relates to the field of frequency synthesis and particularly to indirect frequency synthesizers which use a vernier technique to produce an output frequency in steps which are equal to the frequency difference between the reference signals of two phase loops which are coupled together through a mixer.
Frequency synthesizers using phase lock loops are well known and their technology well developed. The output frequency of a single loop is generally equal to N times the frequency of the loop reference signal, where N is the divider factor of a programmable digital frequency divider within the loop. The loop output frequency can, therefore, be varied in steps equal to the frequency of the reference signal by changing the value of N.
The most serious fundamental limitation of the single loop approach is that high resolution (small frequency step size) requires a low reference frequency which in turn restricts the allowable bandwidth of the loop. This causes a slow loop lockup and poor suppression of reference modulations within the loop.
The vernier technique which uses two phase lock loops coupled through a mixer is an attractive way to overcome the limitations of the single loop frequency synthesizer, since high resolution can be obtained while maintaining relatively high frequencies in the respective loop reference signals. While there are other multi-loop arrangements which offer similar advantages, the vernier approach is fundamentally the least complex.
The most serious disadvantages of the vernier technique is frequency divider programming complexity, since the two divider factors for the respective loop programmable frequency dividers are not simply related to the desired output frequency. The need for a complicated programming logic to generate required divider factors for the programmable frequency dividers of the two loops has limited the past application of vernier synthesis. This invention provides a control device that operates in response to a frequency selection device to select combinations of divider factors for the programmable frequency dividers of the loops which will yield a desired synthesized output frequency.
In addition, the use of multi-loop synthesis techniques has been hampered by the fact that for certain applications internal loop frequencies are generated which cause spurious mixing products with other signals within or without the frequency synthesizer, thereby requiring the need for bulky filtering, isolation and shielding. The invention overcomes this problem by making use of the fact that with the vernier technique different combinations of divider factors for the coupled phase lock loops can yield the same synthesized output frequency. The control device is preset with divider factor selection criteria which are compatible with desired loop operating characteristics, e.g., internal loop frequencies.
The invention also permits more widespread use of programmable frequency dividers using variable modulus prescalers in the coupled phase lock loops of a vernier frequency synthesizer as unallowed divider factors inherent in such programmable frequency dividers can be avoided by appropriate divider factor selection criteria. The invention can also enhance the spectral purity of the output signal of a vernier frequency synthesizer by avoiding divider factor combinations which produce internal loop frequencies which would result in unfavorable spurious mixing products. The invention also allows greater flexibility in the overall construction of the vernier synthesizer, as divider factors and, therefore internal frequencies may be chosen to favor other considerations, such as loop tuning range, gain compensation, loop signal modulatability or other loop parameters. Channel spacing may also be varied without major impact in other parameters.
The control device and its associated preset divider factor selection criteria can be constructed from conventional arithmetic storage, gating and other logic devices, or from programmed memory devices, but is preferably constructed in the form of a microprocessor which is programmed with the divider factor selection criteria for the two loops. The use of a microprocessor simplifies the control device hardware, improves the performance of the vernier frequency synthesizer, and permits easy adaptation of a basic vernier frequency synthesizing loop configuration to a multitude of different frequency synthesis environments.
The use of a micrprocessor to select divider factors particularly permits simplified programming of the basic synthesizer output frequency. Divisor data can be generated in any radix system from a variety of controls or memories and the microprocessor can also calculate other data such as IF (intermediate frequency) offset or channel numbers.
These and other objects and advantages of the invention will become more apparent from the following detailed description of the invention taken in conjunction with the accompanying drawings.